The 74HC595 is an 8-bit serial input, parallel output shift register

The 74HC595 is an 8-bit serial input and parallel output shift register: the parallel output is a three-state output. On the rising edge of SCK, the serial data is input from SDL to the internal 8-bit shift register and output by Q7', while the parallel output stores the data in the 8-bit shift register into 8 on the rising edge of LCK. Bit parallel output buffer. When the control signal of the serial data input terminal OE is enabled low, the output value of the parallel output terminal is equal to the value stored in the parallel output buffer.

8-bit serial input/8-bit serial or parallel output Storage status register, three states.
The 74HC595 is a gate circuit with three-state output function (ie, it has three output states of high level, low level and high impedance). The output registers can be cleared directly. Has a shift frequency of 100MHz.

Parallel output, bus driven; serial input; standard medium scale integrated circuit
The 595 shift register has a serial shift input (Ds), a serial output (Q7'), and an asynchronous low-level reset. The storage register has a parallel 8-bit bus output with tri-state, When OE is enabled (low level), the data of the storage register is output to the bus.
Reference data
Cpd determines dynamic energy consumption,
F1=input frequency, CL=output capacitor f0=output frequency (MHz) Vcc=power supply voltage